电路板PCB工程师英文EQ整理
何姿秦凯-中秋晚会台词
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1 基本信息
（1） 问题：the board
thickness(2.36+-0.05mm) is too hard to control for
us
对我们来说，板厚2.36+-0.05mm太难管控
建议：Can we control the finished board
thickness as 2.4+-10%mm？Please
comfirm!
请确认我们可否控制完成板厚为2.4+-10%mm？
（2） 问题：As show in
figure, manufacturing requirements specification,
using 17 um (12 oz) based copper, finished
surface copper: 46 um
(0.00181
如下图所示，制作说明要
求使用17um基铜，完成铜厚46um.这跟叠构中的1OZ
铜厚不符.
建议：Use 1
oz based copper, finished surface copper: 46 um
(0.00181
使用1oz基铜，完成铜厚46um.
（3）
问题：As show in the below figure, outer copper is 1
oz..We can’t make
sure whether the finished
surface copper is 1 oz.
如下图所示，外层铜厚为1OZ，我们不能确定完成铜厚是否为1OZ.
建议：Using Hoz base copper, finished surface 1 oz
copper;
使用H oz基铜，成品铜厚为1oz.
（4） 问题：The stack-up your company provided did
not conform the
requirements of impedance, and
the inner layers need to use 3
Pre-preg.
贵司提供的叠构不符合阻抗要求，且内层需要用3张pp
建议：Adjust the
thickness of the Pre-preg and the core。See below.
调整芯板和PP的厚度，见下图
（5） 问题：The make-
up like as the attachment （12PCSPNL），in order to
save the costing ,please confirm if can accept
3 X-OUT per panel?
如附件所示拼版（12pcsPNL），为了节约成本，请确认可否接受每个拼版
内有3个打叉板？
建议：Accepted 3 X-OUT per panel,but not
exceed 5% of order
pack them separately when
shipping.
接受每拼版出3个打叉板，但不超过总订单数的5%，且出货时把打叉板分
开包装.
（6） 问题：As show in figure, Your company
requirements according to level
3 standard
controls, this requirement is too hard to control
for us
如下图所示，贵司要求按3级标准管控，我们较难管控.
建议：Controlled by level 2 standard
production.
。
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按2级标准管控生产.
（7） Please confirm the attached panel drawing.
请确认附件拼版图
（8） Above is our suggested
stackup，please confirm.
上图为我司建议叠构，请确认.
（9）问题：Your company have
not provided the tolerance of board
thickness，
please confirm whether we could
control it as 1.6mm+-10%？
贵司没有提供板厚公差，请确认我司可否按1.6mm+-10%来管控？
（10）问题：We can't find the finish copper
thickness and solder mask color
in spec
,please provide.
我们在说明书中找不到完成铜厚和防焊颜色，请提供.
建议：Finish copper
thickness:1oz, SM color: matte
green
完成铜厚1OZ
防焊颜色：哑光绿色
（11）问题：Please see Fig1,the
number in gerber is different from
请看图一，gerber中的料号跟说明书中的不相
符.
建议：We will
ignore this difference and follow the gerber file
to produce
this board.
我们将忽略这个不同点，然后按照gerber来制作.
（12）问题：The customer requires use FR - 402
material, but we have not
this kind of sheet
material . 客户要求使用FR-402板材，但我们没有这种板
材.
建议：We will use our common
material production，Please confirm！
Like
KB6160 or equivalent instead of FR-402.
我们将使用常用的板材生产，请确认.像KB6160或同等级的板材来
代替FR-402.
（13）问题：In order to avoid the panel
board scraped in process, we would
like to
change the sharp corner to round angle as R1.0mm.
为了避免板子在生产过程中刮花，我们将尖的角倒角为R1.0mm 的
角.
（14）问题：See below figure，50 Ohm impedance is
controlled in the gerber,
but
the e-mail
indicated that had no controlled
impedance;Actually, the calculation
also
cannot reach 50 Ohm impedance values . 见下图，gerbe
r中要求做50ohm阻抗
控制，但邮件中说明不用做阻抗控制。事实上也达不到50ohm阻抗值.
建议：Ignore the impedance
control.
忽略阻抗控制.
。
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（15）问题：There is no 60mil core on our store，we will
adjust the stackup
as below fig. B show.
我们仓库没有60mil的芯板，我们将调整叠构，如图B所示.
（16）问题：It is too hard to keep conductor widths and
spacing within 15%
of data for us.
要将线宽距控制在+-15%，对我们来说太难了
建议：We
suggest to relax it as +-20% to process .
我们建议放宽到+-20%
（17）问题：You do not
specify the incept standard. We will follow
IPC-A-600G
Class2 and IPC-6012B Class2 to
build this board.
贵司没有指明验收标准，我们将根据IPC2级标准来生产板子.
（18）问题：It doesn’t specify thickness of Ni and Au.
没有说明镍和金的厚度.
建议：We will control as : Ni: 3-6um min and
Au≥0.05um
我们将管控为：镍最少3-6um，金≥0.05um
（19）问题：We can’t input the four files（see below
fig.） by our software
用我们的软件打不开下图的4个文件.
建议：We will
ignore the four files.
我们将忽略这4个文件.
（20）问题：We are not
sure the surface finish of this board，because the
requirement of two files are different.（See
below pictures.）
我们不能确定这个板的表面处理，因为2个文件的要求不同.（见下图）
建议：We will follow immersion gold to
produce.(
Au:0.05um(min),Ni:3-6um)
我们将按沉金制作.（金厚最少0.05um，镍厚3-6um）
（21）问题：Please see below picture, the dimension
between the gerber and
the drawing is
different. 请看下图，图纸和gerber的尺寸不一样.
建议：We will follow gerber file to produce.
我们将依gerber制作.
（22）问题：We
don’t know the usage of these file ,and we think
them have
nothing to do for PCB manufacture.
我们不知道这些文件的用处，我们认为他们对PCB
生产没有影响.
建议：We will ignore it. 我们将忽略他们.
（23）问题：We don't have the standard of the
hand.
我们没有的标准控制.
。
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建议：We will ignore this standard and follow
IPC-4101B standard to
produce.
我们将忽略这个标准，然后按IPC-4101B标准来生产.
（24）问题：In the future, for the same series, if we
meet the same questions
like as above, we will
use the answer directly
后续问题中，如有类似以上问题，我们将直接使用这次的回复来生产.
2 文字
（1） 问题：Some fonts are close to pads,
into holes or outside of the board
outline.
一些文字太靠近pad，进孔或到了板外.
建议：We will move them
if possible, otherwise we'll clip them, please
confirm.
如果可能，我们将文字移动，否则我们会修剪文字，请确认.
（2） 问题：We will add the UL,including our
logo and date code(WWYY) at free
area on the
top silkscreen layer.
我们将在顶层文字的空旷位置添加UL，包括我们
的标记和周期.
（3）问题：In order to identify the board easily,
we would like to add our internal
part number
on the breakaway rails.（or near our company UL）
为了更好地
区分板子，我们想要在工艺边上添加我司料号.（或在我司UL附近）
（4）问题：We turn the logo to on the bottom
silkscreen or not?Please
confirm.
请确认我们可否将底层文字的UL改为？
（5）问题：You request to
add UL and date code（WWYY）on the appointed
position ,
but the drawing without appointed
position 。We will add our company UL and
date
code（WWYY） on bottom silkscreen layer as below
fig.
贵司要求在指定位置添加UL和周期（WWYY），但图纸上没有
标出指定的位
置.我们将在底层文字添加我司UL和周期(WWYY)，见下图.
（6）问题：Some White oil block are printed on the
pads, it will affect the
solderability of the
pads. 一些白油块在pad上，这会影响pad的焊接性能.
建议：We
will modify the legend to avoid them exposing on
the pads.
我们将修剪文字来避免他们上pad.
(7) 问题：Some fonts are too close to the
outline,it may cause the fonts to
。
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be
incomplete after manufacturing.
一些文字太靠近外形线，这可能会导致加工后文字出现残缺.
建议： Reduce the
font size to accommodate the tight space if
possible，
otherwise accept the incomplete
fonts.
如果可能的话，缩小文字到一个小空间内，否则就接受文字残缺.
（8）
问题：Tthere is no enough space for adding the UL and
date code on
the top silkscreen layer
顶层文字不够空间添加UL.和周期
建议：A：We will add them on the
bottom silkscreen layer.
B：We will add
them on the top soldermask layer.
A：在底层文字添加
B：在顶层防焊添加
（9） 问题：Some legend are not mirrored on the
bottom sides.
在底层中，有一些文字没有镜像.
建议：A：we will follow geber to produce and
accept the legend are
inverse.
B:we will
mirror it.
A：我们将依gerber生产，要接受反字.
B：我们将镜像制作.
（10） 问题：The legend is very
close to dummy copper pads in the working
gerber.
在工作稿中的文字太靠近焊盘.
建议：A:We will shave the dummy copper pads to avoid
the illegible
legend.
B: Follow working
gerber to build,and the illegible legend is
acceptable
A：我们将削铜粒来避免文字模糊.
B：依工作稿制作，接受文字模糊.
（11）问题：In order to avoid the silkscreen is
missing, we will add the check
patterns on the
breakaway rail. 为了防止漏印文字，我们将在工艺边添加测试图
案.
3 防焊
（1） 问题：Spacing between IC pads are
6.7mil and 7.5mil. We need 7.8mil
to keep the
solde rmask dam..Becausethe solder mask ink are
blue color
which is out of our capability to
build the blue solder mask dam.
I
C之间的距离是6.7和7.5mil，我们需要7.8mil的距离来做防焊桥.
因为防焊颜色为蓝色
，这样距离的蓝油桥超出我们的制程.
。
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建议：We suggest
canceling the solder mask dam where the IC spacing
is
less than 7.8mil and make gang relief.
Please confirm is that acceptable.
我们建议在小于7.8mil的地方取消做防焊桥，然后按开通窗制作.请确认
是否接受.
（2） 问题：Spacing between the BGA PAD and via
hole is only 9.8mil, and
there's solder mask
dam. The spacing is too small to keep dam.
BGA到过孔的距离只有9.8mil，而且要做防焊桥.这个距离太小，不能做桥.
建议：We will remove the via's (not the BGA pads)
openings
我们将移除过孔的开窗（不是BGA的开窗）.
（3） 问题：The
∮29mil component holes without solder mask
openings on
bottom sides,the solder mask ink
will flow into holes
∮29mil的元件孔在底面没有开窗，油墨会进孔.
建议：A) We add
solder mask openings for hole, Make sure the oil
is
not on the PAD and not flow into the hole.
B) We follow the GERBER to do ,Please confirm
the solder mask ink will flow
into holes are
accepted.
A：我们将为这些孔添加防焊开窗，确保油墨不上pad和油墨不进孔.
B：我们根据gerber制作，请确认可接受油墨进孔.
（4）问题：See below figure,there is one pad on the
bottom paste layer, but
it without soldermask
opening on the bottom solder layer.
见下图.贴片
层上有一个pad没有开窗.
建议：A：follow
the gerber.
B:Add soldermask
opening that is 8mil bigger than the pad.
A：依gerber制作.
B：加一个比pad大8mil的开窗.
（5） 问题：The Φ1.0mm holes with
soldermask opening on the top soldermask
layer
,but the bottom comfirm our suggestion
Φ1.0mm的孔在顶层有开窗，但底层没开窗。请确认我们的建议.
建议：A：Follow the gerber to process. 按gerber生产.
B：Add the soldermask opening for
the holes on the bottom layer，
the size is the
same as the top. 在底层添加开窗，大小跟顶层一样.
（6） 问题：The soldermask opening of dia.0.40mm
holes is only 8mil bigger
than the via holes.
直径0.40mm的孔防焊开窗只比过孔大8mil.
建议：A：Cancel the soldermask opening of via
holes，the via holes
plugged with solder mask
is accepted. 取消过孔的防焊开窗，
接受过孔塞油.
B：follow the gerber，and accept solder mask into
the hole but
。
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no plugging
依gerber制作，接受油墨入孔，但不塞孔..
（7） 问题：The two
dia.3.2mm holes are specified as PTH in drill
chart .But
the soldermask opening is less than
the pads on bottom soldermask
layers.
分孔表上直径3.2mm的孔是制作为PTH，但在底层防焊层里，开窗比pad小.
建议：We will follow gerber to produce，and allow
the solder mask
encroach onto these pads.
我们将根据GERBER生产，然后接受油墨上pad.
（8） 问题：Some
solder mask opening for the fiducial mark is too
big that
it caused nearboring trace exposed in
the working gerber.
一些光学点的开窗太大，导致工作稿中他们邻近的导线露铜.
建议：We will
trim the solder mask opening to avoid the trace
exposed.
我们将修改防焊开窗来避免铜线外露.
（9） 问题：There is no solder mask opening on one
side for the via hole
Φ16mil.
Φ16mil的孔有一面防焊没开窗.
建议：A：Plug these via
holes with solder mask ink.
B：Add
solder mask opening both sides for the via hole
Φ16mil.
A:塞孔制作.
B：Φ16mil的孔双面开窗.
4 线路
（1） 问题：Fab spec
indicates controlled impedance, but doesn't
indicate
the trace widthgap and which
layer(s).
说明书要求控制阻抗，但没有指明阻抗线是哪层和线宽距.
建议：Please
provide, or please confirm if we can ignore the
impedance
request
请提供，或请确认我们是否可以忽略这个阻抗要求
（2） 问题：The
fiducial marks are isolated so they can easily
peel off
during production.
光学点是孤立的，所有生产时容易脱落.
建议：We will add the
protective copper ring around them. Please confirm
is that acceptable. 我们将在他们周围添加保护环。请确认可否接受.
（3） 问题：Vias to be covered per the
additional requirement.
过孔制作方式按照特别要求.
建议：there are 8mil, 10mil
and 12mil holes, so we will treat all of
them
as
。
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mask openings on both sides if any, and leave
the other holes (24mils and
greater) solder
mask as design, correct?
我们把8mil, 10mil
和12mil的孔定为过孔，在每一面通过去掉防焊开窗来
使他们塞油，像设计那样把其他的孔（24m
il或更大的）开窗制作，正确吗？
（4） 问题：3 tooling holes
(3.2mm NPTH) to be added on rails per the
additional requirement.
按照特殊要求添加3个3.2mmNPTH在工艺边上.
建议：We suggest adding
tooling holes on all 4 corners of the rails
to
provide more flexibilities during PCB
manufacturing and assembly,
and add 3
fiducials (1mm round pads, 3mm solder mask
openings) on 3
corners to be
我们建议在工艺边的4个角添
加定位孔，来使更适合PCB生产和装配.在3个
角上添加3个光学点（1mm大小，3mm开窗）来防
呆，能接受吗？
（5） 问题：In order to
facilitated in production， we will remove the
no-function isolated pads on the inner layers.
为方便生产，我们将删除内层里一些无功能的孤立pad.
（6）问题：Some solder mask openings are very big and
exposing the surrounding
copper planes.
一些防焊开窗太大，会导致铜皮外露.
建议：We will reduce the
solder mask openings to our default pad opening
size, and if there's still a risk of exposing
the surrounding copper, we will
shave the
copper plane a little to avoid exposure, is that
acceptable?
我们将会对不正常的防焊开窗缩小，如果仍然有铜外露的风险，
我们将会削一
点铜皮来避免外露，能接受吗？
（7）问题：Outer layers to be 2.1mil (1.5oz, we
consider it as nominal) per
provided stackup,
but due to the tight spacing (5.8mil only) on this
design we can
only use 0.5oz base copper. 所
提供的叠构中，外层铜厚为2.1mil（1.5oz，我们认
为这是近似值），但由于设计上紧密的线
距（只有5.8mil），我们只能用0.5oz的基铜来制
作.
建议：We will use 0.5oz base copper and plate to
minimum 1oz copper on
outer layers, is that
acceptable?
我们将使用0.5oz底铜，然后外层最少电镀到1oz
铜厚，这能接受吗？
（8） 问题：Inner layers to be 2oz per provided
stackup, but the spacing
on inner layers is
tight, also we can't follow the provided stackup
on the dielectric thickness under outer layers
because they are too
thin for 2oz copper.
根据所提供的叠构，内层要做2oz，但是内层的线太密，满足外层的阻抗的
条件下，我们不能使用所提
供的叠构.因为在2oz的铜厚条件下，介电物质
太薄了.
建议：Option A: to use 1oz copper on inner layers,
and we don't need to change
。
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the stackup
and impedance trace widths;
Option B: to use
2oz copper on inner layers, but need to change the
stackup and
impdance trace widths.
建议A：内层使用1oz铜厚，这样我们就不需要调整叠构和阻抗线的线宽.
建议B：内层使用2oz铜厚，但需要调整叠构和阻抗线的线宽.
（9）问题：The PAD is too closed to the outline, which
will induce the copper
exposed after process.
Pad太靠近外形线，会导致加工后出现铜外露的现象.
建议：Shave
the copper keep to the outline 8mil to avoid the
copper exposed.
削铜保持距离外形线8mil，防止铜外露.
（10） 问题：See your
company provide the SPC, we are not sure whether
to
need to increase the fiducial mark on the
breakaway rail.(Because the
breakaway rail
have not fiducial mark in the GERBER)
根据贵司提供的说
明书，我们不确定是否需要在工艺边上添加光学点.（因
为gerber中的工艺边上没有光学点）
建议：A) We will add the ∮2.0mm fiducial mark
and ∮3.0mm solder
mask opening of fiducial
marks on breakaway rails（see fig）.
B） Do not
need add fiducial mark on the breakaway
rail,follow the
gerber to do.
A：我们将在工艺边上添加∮2.0mm的光学点，开窗3mm.（见图）
B：不需要再工艺边上加光学点，按gerber制作.
（11） 问题：We
will add the V-cut testing pads to avoid V-cut
being missed.
我们将添加V-CUT测试pad来防止漏V-
CUT.
（12）问题：In order to balance the
plating electric current, we would like
to add
dummy copper foil （copper pads）on the breakaway
rails. 为了
平衡电镀的电流，我们想要在工艺边上添加铜皮.（铜pad）
（13）问题：See below figure，the copper is too
close to the outline，it
would cause the copper
exposed. 见下图，铜皮到外形线太近，这会导致铜皮
外露.
建议：A：accept exposed copper.
B：shaving the copper，keep it 10mil from outline
and 16mil from
V-CUT line.
A：接受露铜.
B：削铜，使之距离外形线10mil，距离V-CUT线16mil.
（14）问题：Inner and outer layers in the gerber have
meaningless line.
Gerber的内层和外层存在无意义的线.
建议：A：follow
the gerber. 依gerber制作.
B：Delete the meaningless line 删除无意义的线.
。
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（15）问题：This board is a bare board without will
build without
fiducials.
这是一个光板，我们将不加光学点.
5 金手指
（1）问题：In order to
plate the gold on will add the leading plating
line as the below picture.
为了电金手指，我们将添加如下图的电镀线.
（2） 问题：We found the
area of gold finger have solder mask dam in the
Gerber.
我们在gerber中发现金手指位置有阻焊桥.
建议：To aviod the solder mask dam affects
the function gold finger,we
will cancel it and
add the full solder mask opening for the area of
gold finger.
为了避免阻焊桥影响金手指的功能，我们将删除阻焊桥和在金手指位置开通
窗.
（3） 问题：No specify the depth tolerance of gold
finger bevel edge. We will
build gold finger
bevel edge depth tolerance as ±0.2mm..
没有说明金手指斜边的公差，我们将按+-0.2mm制作.
（4） 问题：The
gold finger is too close to the will cause the
copper
exposed.
金手指太靠近外形线，这会导致铜外露.
建议：A:To clip gold finger to get 52mil (min)
space to avoid copper
exposed.
B: Follow
Gerber to do, please accept copper exposed.
A：修剪金手指，保证离外形最少有52mil的距离，防止铜皮外露.
B：依GERBER制作，请接收铜外露.
（5） 问题：It does
not specify the bevel angle tolerance.
没有说明斜边角度的公差.
建议：The bevel angle as ±5°
to control.
斜边角度按+-5°来管控.
（6） 问题：The gold finger outside is the
breakaway rail ，we can't make the
gold finger
chamfer.
金手指边沿是工艺边，我们做不了金手指的斜边.
建议：A：Canel
the breakaway on gold finger side.
B：Don't make the gold finger bevel edge.
A：在金手指那边取消工艺边.
B：不做金手指斜边.
。
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6
钻孔丶成型
（1）问题：The∮0.35mm holes diameter
tolerance :±0.05mm is too hard to
control.
∮0.35mm的孔公差+-0.05mm太难管控.
建议：This kind of holes’ diamater tolerance：±0.076mm
这类孔的公差为+-0.076mm
（2）问题：The quantity of holes are different between
excel spec and gerber
file.
Excel文档跟gerber的孔数不同.
建议：We will
follow gerber file to do and ignore the difference
我们将根据gerber来制作，忽略这个不同点.
（3）问题：some data can't measure in
drawing , suggest to ignore it and
follow the
GERBER to do。
图纸上的一些数据测量不了，建议忽略他们，然后根据gerber来制作.
（4）问题：Customer did not identify the V - CUT Angle,
and the laminate
remained ：0.5+ 0.127 -0 mm
and V-CUT can extend 30% into board max, we also
difficult to control in production.
客户没有说明V-
CUT角度，残厚要求：0.5+0.127-0mm，最大深度为板厚的
30%，我们生产太难管控.
建议：We ignore the V-CUT can extend 30% into
board max .and conctrol the
v-cut the laminate
remained is: 0.5mm+0.2-0mm, Angle: 30+- 5 degree.
Pleae
confirm.
我们忽略V-CUT最大深度为板厚的30%，然后管控残
厚为0.5mm+0.2-0mm，角度30°
±5°.请确认.
（5）问题：V - CUT lines and rout side overlap
position, there will be a burr after
forming.
V-CUT线和锣边重叠位置在成型后会出现披锋.
建议：In
order to avoid the burrs, we'll rout into the
breakaway rail.
为了避免披锋，我们将锣进工艺边.
（6）问题：Some inside
corners,it is hard to build according to our
process.
板内的角对于我们生产来说太难了.
建议：we will
control inside corner as R1.0mm (MAX).
我们将倒角R1.0mm（最大）
（7）问题：Hole size and
dimension tolerances are not provided.
。
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孔大小公差和外型公差没有提供.
建议：We will
control as PTH: ±3mil, NPTH: ±2mil, Slot: ±4mil.
Outline dimension tolerance +-5mil.
我们将管控为：PTH+-3mil，NPTH+-2mil，Slot+-4mil。外型公差+-5mil
（8）问题：The unit board is so small that we
couldn’t add the pips as same as your
requirement in .
pcs太小了，我们不能按文件要求添加连接
位（皮）.
建议：We add the 2.5mm pips and dia.0.6mm stamp
holes,Please confirm
our panel drawing.(
detail please refer to the file of “panel ”)
我们添加2.5mm连接位和直径0.6mm的邮票孔.请确认我们的拼版图.（细
节请参考文件“pa
nel ”.
（9）问题：The holes (dia.2.35mm) are
defined as PTH but they have no corresponding
copper pads on both sides.
2.35mm的孔定义为PTH，但他们两面都没有相应的pad.
建议：We
will change them to NPTH. 我们将他们改为NPTH.
（10） 问题：Two holes are overlap ，we suggest to
build the holes as a solt
1.3mm*1.8mm.
有2个孔重叠在一起了，我们建议将这2个孔钻成1.3*1.8mm的槽孔.
（11）
问题：NPTH has no clearance to the copper， it will
cause hole plated
Cu in processing.
NPTH跟铜皮连在一起了，这会导致生产过程中，孔被镀上铜.
建议：Follow
as NPTH，shave the copper around the hole and keep
8mil
clearance.制作为NPTH，在孔周围掏铜8mil.
。
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